Engineer 2 – Dft

Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc. People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our [Vision, Mission, and 11 Guiding Values](https://www.microchip.com/en-us/about/careers/mission-and-values); we affectionately refer to it as the _Aggregate System_ and it’s won us countless awards for diversity and workplace excellence. Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over [30 years of quarterly profitability](https://www.microchip.com/en-us/about/investors) without a great team dedicated to empowering innovation. People like you. Visit our [careers](https://www.microchip.com/en-us/about/careers/working-here) page to see what exciting opportunities and company [perks](https://www.microchip.com/en-us/about/careers/working-here) await! **Job Description:** * We are looking for a highly motivated **DFT / ATPG Engineer with 2+ years of experience** in SoC/ASIC test methodology, ATPG, scan and MBIST. The candidate should have strong hands-on expertise in DFT implementation on hierarchical designs and good experience with Tessent/Modus tools for ATPG, MBIST, and diagnosis. In addition to core DFT responsibilities, this role will also contribute to **DFT automation flow development using Python** and support **contemporary AI-based technical initiatives internally within Microchip**, aimed at improving productivity, debug efficiency, and overall flow quality. **Key Responsibilities** * Develop and maintain **Python-based automation flows and utilities** for DFT setup, pattern generation support, report parsing, coverage analysis, debug, and productivity improvement. * Contribute to **flow development and automation infrastructure** to improve ATPG execution efficiency and methodology reuse across projects. * Support and participate in **internal AI-driven technical initiatives** related to DFT/ATPG automation, debug assistance, data analysis, and engineering productivity improvement within Microchip. * Handle **DFT implementation and support for hierarchical designs**. * Work on **Tessent/Modus ATPG flow** for DFT setup, pattern generation, validation, and coverage analysis. * Support **Tessent/Modus MBIST flow** for MBIST hardware generation and integration. * Use **Tessent/Modus diagnosis tools** for failure analysis and on-silicon debug. * Perform **scan pattern simulation, debug, and pattern validation**. * Support **ATPG pattern delivery to the Test Engineering / ATE team**. * Debug **simulation and DFT issues at block and SoC level**. * Collaborate with **CAD, Design, STA, Product Engineering, and Test teams** to drive DFT solutions and new initiatives. **Requirements/Qualifications:** * **2+ years of experience** in **DFT / ATPG engineering**. * Strong hands-on experience in **scan pattern simulation and debug**. * Strong knowledge of Python scripting for automation, flow development, and methodology enhancement. * Interest or exposure in applying **AI/ML-based engineering techniques** for automation, debug, or data analysis is a plus. * Good written and verbal communication skills. * Hands-on expertise in handling **DFT on hierarchical designs**. * Strong experience with **Tessent and/or Cadence Modus ATPG tools** for DFT setup and pattern generation. * Experience with **Tessent/Modus MBIST tools** for MBIST hardware generation. * Experience with **Tessent/Modus diagnosis tools** for on-silicon debug. **Preferred Skills** * Familiarity with **Perl, Tcl, or Shell scripting** is a plus. * Strong problem-solving and debugging skills. * Self-motivated team player with the ability to work across cross-functional teams. **Travel Time:** 0% - 25% **To all recruitment agencies**: _Microchip Technology Inc. **does not** accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes._