Lead SWE

**At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.** ----------------------------------------------------------------------------------------------------------------- **Job Overview:** This role will contribute directly to the **development and enhancement of AMBA Performance verification**   focusing on protocol functionality, performance, and robustness. This work may involve: * Implementing AMBA protocol features and state machines * Developing debug, trace, and analysis capabilities * Working closely with architects and executing features per plan.  **Job Responsibilities:** * Designing and implementing protocol functionality in AMBA AVIP * Developing and debugging BFMs, transactors, and associated software interfaces * Ensuring correctness, performance, and scalability in emulation and acceleration flows * Supporting customer issues, reproducing problems, and delivering fixes **Job Qualifications:** * Strong fundamentals in **digital design, computer architecture, and system‑level verification** * Experience with **hardware description languages (SystemVerilog/Verilog)** and/or **C/C++** * Understanding of **standard interconnect and bus architectures** (e.g., AMBA, UFS/Unipro/MPhy) * Familiarity with **emulation, acceleration, or hybrid verification flows** is a strong plus * Good debugging skills using waveforms, logs, and protocol analyzers * Ability to work across hardware and software boundaries **We’re doing work that matters. Help us solve what others can’t.** -------------------------------------------------------------------