Post-Silicon Validation Engineer

1010 analog devices

📍 us massachusetts wilmington united states🕐 1mo ago🔗 workday

Job Description

**About Analog Devices** Analog Devices, Inc. (NASDAQ: [ADI](https://finance.yahoo.com/quote/ADI/?ltr=1)) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at [www.analog.com](https://www.analog.com/en.html) and on [LinkedIn](https://www.linkedin.com/company/analog-devices) and [X](https://x.com/ADI_News). Staff Engineer, Post Silicon Validation ======================================= About the Role -------------- We are seeking a **Staff Engineer** to lead the application of **AI-enabled techniques to post-silicon test, evaluation, and characterization** across mixed-signal and SoC products. This role sits within Engineering Enablement and is intended for a **deeply experienced post-silicon engineer** who understands how silicon is actually evaluated in labs and on ATE—and who can **strategically apply AI/ML and agentic tools** to accelerate, scale, and improve those workflows. This is a **hands-on, high-impact individual contributor role** with broad cross-functional influence. You will define _how_ AI is practically used in evaluation, characterization, calibration, trimming, and qualification—not as an abstract data science exercise, but as a tool to reduce measurement effort, improve insight, and shorten time-to-confidence in silicon. Core Responsibilities --------------------- ·        Identify high-leverage opportunities where **AI/ML can materially improve post-silicon workflows**, such as: \-       Adaptive characterization (intelligent selection of next measurements) \-       Anomaly detection in parametric, waveform, and RF data \-       Measurement clustering and outlier identification \-       Automated regression triage and silicon learning \-       Calibration and trimming optimization ·        Apply and integrate **existing AI/ML technologies**, including: \-       Classical ML (clustering, regression, Bayesian methods) \-       Time-series and waveform analysis techniques \-       Agentic AI systems for lab automation, test orchestration, and debug assistance ·        Serve as a **technical bridge** between silicon/test engineers and: \-       Internal ML specialists \-       External vendors \-       Academic or ecosystem partners ·        Evaluate and prototype AI-enabled tools for post-silicon ·        Develop **reference workflows, guidelines, and examples** for AI-assisted evaluation and characterization. ·        Create reusable frameworks that scale across products, nodes, and business units. ·        Mentor engineers on: \-       Modern post-silicon data analysis techniques \-       Practical use of AI tools in the lab and on ATE ·        Represent the organization in Technical reviews, Vendor engagements, Industry forums **Required Qualifications** ·        **8+ years** of hands-on experience in **post-silicon test, evaluation, characterization, or validation** of ASICs or SoCs. ·        Deep practical experience with **mixed-signal and/or high-speed digital blocks**, such as: \-       ADCs/DACs, PLLs, clocking \-       SERDES, PHYs, high-speed IO \-       Power, timing, and signal-integrity-sensitive designs ·        Strong understanding of: \-       Silicon bring-up \-       Measurement instrumentation and data interpretation \-       ATE-based test and characterization flows ·        Proven ability to debug silicon issues with **limited observability** and noisy data. ·        Working knowledge of **applying ML techniques to real measurement data**, including Statistical modeling, Pattern recognition & Anomaly detection ·        Experience using or integrating **AI-enabled tools** in engineering workflows. ·        Comfortable working in **Python-based analysis environments** (not necessarily building ML frameworks). ·        Ability to reason about **data quality, bias, observability limits, and measurement noise**—especially in analog/RF contexts. ·        Strong cross-functional communication skills; able to translate between silicon, test, and software/AI domains. ·        Demonstrated technical leadership as a senior IC: \-       Driving initiatives without direct authority \-       Influencing methodology and direction ·        Comfortable operating across abstraction levels—from waveform-level analysis to system-level implications. **Preferred Qualifications** ·        Experience with **adaptive or data-driven characterization**, yield learning, or post-silicon tuning. ·        Exposure to **reinforcement learning, Bayesian optimization, or active learning** concepts applied to engineering problems. ·        Familiarity with **RF test and characterization** (EVM, phase noise, spurs, jitter, BER). ·        Experience working with or evaluating: \-       Lab automation platforms \-       Test data analytics platforms \-       AI-assisted debug or analysis tools ·        Participation in industry conferences, standards groups, or technical publications related to silicon validation or test. _For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export  licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls.  As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process._ _Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group._ _EEO is the Law: [Notice of Applicant Rights Under the Law](https://www1.eeoc.gov/employers/upload/eeoc_self_print_poster.pdf)._ Job Req Type: Experienced Required Travel: Yes, 10% of the time Shift Type: 1st Shift/Days The expected wage range for a new hire into this position is $131,285 to $190,108. * Actual wage offered may vary depending on work location, experience, education, training, external market data, internal pay equity, or other bona fide factors. * This position qualifies for a discretionary performance-based bonus which is based on personal and company factors. * This position includes medical, vision and dental coverage, 401k, paid vacation, **holidays, and sick time**, and other benefits.
Post-Silicon Validation Engineer at 1010 analog devices | MergeJobs