Principal Digital Design Engineer

An experienced Digital Design Engineer is responsible for designing, developing, and optimizing digital logic circuits and systems for semiconductor, FPGA, or ASIC-based products. The role involves working across the full design cycle—from specification and RTL design to verification, synthesis, and silicon validation. ================================================================================================================================================================================================================================================================================================================================ **Key Responsibilities** ------------------------ * Design and develop **RTL (Register Transfer Level)** code using Verilog/SystemVerilog/VHDL * Architect and implement **complex digital blocks and subsystems** * Perform **functional verification** using simulation tools and methodologies (UVM/OVM) * Develop and execute **testbenches and validation plans** * Perform **logic synthesis**, timing analysis, and area optimization * Debug and troubleshoot design issues at RTL, gate, and silicon levels * Collaborate with **verification, physical design, and firmware teams** * Ensure designs meet **power, performance, and area (PPA)** targets * Participate in **design reviews, code reviews, and technical discussions** * Work with EDA tools for design implementation and validation * Support **post-silicon validation and bring-up activities** **Required Skills & Expertise** ------------------------------- ### **Technical Skills** * Strong proficiency in: * Verilog / SystemVerilog / VHDL * Experience with: * RTL design and simulation tools (ModelSim, VCS, Xcelium) * Synthesis tools (Design Compiler, Genus) * Static Timing Analysis (PrimeTime) * Understanding of: * Digital logic design concepts * FSMs, pipelining, clock domain crossing (CDC) * Low-power design techniques * Knowledge of: * FPGA/ASIC design flow * Bus protocols (AXI, AHB, APB) * Experience in debugging using: * Waveform tools (Verdi, SimVision) ### **Preferred Skills** * Experience with **UVM-based verification methodology** * Familiarity with **DFT (Design for Testability)** concepts * Exposure to **scripting languages** like Python, Perl, or TCL * Knowledge of **hardware-software co-design** * Experience in **high-speed interfaces or SoC design** **Experience Requirements** --------------------------- * Typically **10+ years** of experience in digital design or ASIC/FPGA development * Proven track record of successful **tape-outs or product deliveries** **Education** ------------- * Bachelor’s or Master’s degree in: * Electronics Engineering * Electrical Engineering * VLSI Design * Computer Engineering **Soft Skills** --------------- * Strong problem-solving and debugging abilities * Excellent communication and teamwork skills * Ability to work in fast-paced, deadline-driven environments * Attention to detail and quality-focused mindset [More information about NXP in India...](https://www.nxp.com/company/about-nxp/worldwide-locations/india:INDIA) #LI-29f4