Principal Engineer- Design

microchip - usa

📍 arizona - chandler united states🕐 21d ago🔗 workday

Job Description

Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc. People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our [Vision, Mission, and 11 Guiding Values](https://www.microchip.com/en-us/about/careers/mission-and-values); we affectionately refer to it as the _Aggregate System_ and it’s won us countless awards for diversity and workplace excellence. Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over [30 years of quarterly profitability](https://www.microchip.com/en-us/about/investors) without a great team dedicated to empowering innovation. People like you. Visit our [careers](https://www.microchip.com/en-us/about/careers/working-here) page to see what exciting opportunities and company [perks](https://www.microchip.com/en-us/about/careers/working-here) await! **Job Description:** Microchip’s NCS Team is seeking an experienced **FPGA Design Engineer** to support PHY (Physical Layer) development and system-level solutions for our next generation of USB and Ethernet products. The role will involve working closely with digital, analog, and software engineers to develop, integrate, and validate FPGA-based platforms supporting mixed-signal IP and SoC products. The candidate must be located in the **Chandler Design Center**. **Requirements/Qualifications:** * **10 years or more of experience** in FPGA and/or digital design, with solid hands-on experience in RTL coding, simulation, synthesis, and hardware implementation. * Strong proficiency in **Verilog and/or SystemVerilog** for synthesizable RTL design. * Strong understanding of digital design fundamentals, including state machines, datapaths, pipelines, clocking, resets, FIFOs, memories, and interface logic. * Hands-on experience developing **self-checking testbenches** and performing functional simulation and debug using tools such as **QuestaSim/ModelSim** or equivalent simulation environments. * Hands-on experience with FPGA synthesis, implementation, timing analysis, and place-and-route using vendor design environments such as **AMD/Xilinx Vivado**. * Ability to define and analyze timing constraints and experience designing systems containing **multiple clock domains**. * Experience optimizing FPGA designs to achieve required **performance, area/resource utilization, and target clock frequencies**. * Experience with **FPGA system integration and board-level bring-up**, including loading FPGA images, exercising hardware interfaces, and debugging designs on physical circuit cards. * Hands-on experience using laboratory debug equipment such as **oscilloscopes, logic analyzers, protocol analyzers, and FPGA embedded logic-debug tools** or equivalent. * Ability to work closely with **hardware, firmware, software, ASIC, analog, verification, and validation teams** during system integration and lab bring-up. * Experience in **USB and Ethernet PHY architectures and protocols** is a strong plus. * Provide clear design documentation, including **requirements, FPGA architecture, block diagrams and interface control documents**. * Proficiency in scripting languages such as **TCL, Python, Perl. Linux shell programming** or programming languages such as **C++ or RUST** for automating FPGA build, simulation, synthesis, and implementation flows. * Knowledge of revision-control systems such as **Perforce, Git, DesignSync, or equivalent**, including experience with tagging, branching, configuration management, and release methodologies. * Must possess strong **verbal and written communication skills** and be able to participate effectively in technical discussions and design reviews, provide project updates, and develop functional and technical documentation. **Travel Time:** 0% - 25% **Physical Attributes:** Feeling, Hearing, Seeing, Talking, Works Alone, Works Around Others **Physical Requirements:** 80% sitting, 10% standing, 10% walking Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law. For more information on applicable equal employment regulations, please refer to the [Know Your Rights: Workplace Discrimination is Illegal Poster](https://www.eeoc.gov/poster). **To all recruitment agencies**: _Microchip Technology Inc. **does not** accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes._
Principal Engineer- Design at microchip - usa | MergeJobs