Technical Specialist Process Development & Scaled Pilot Production

**Role Intent** Take a lab/prototype semiconductor process (wafer bonding + photonic materials + fab module integration) and turn it into a repeatable, high-yield, well-documented pilot line process that can ship industry-grade sample lots with credible specs, traceability, and supply-chain stability. In short: from "it works" to "it ships." **Core Responsibilities** **A. Define the pilot-line process architecture** & **roadmap** Own the end-to-end process flow definition for the targeted platform (e.g., CMOS+ll1-V / CMOS+GaN, CMOS+ TFLN bonded substrates, on-insulator stacks), including module boundaries, critical interfaces, and maturity roadmap to pilot scale. **B. Develop, optimise, and lock process recipes for scale** Lead hands-on process development and optimisation across the critical modules, including (as applicable to the project): * Wafer bonding process development (bond interface quality, dielectric thickness tuning, densification windows, yield ramp) * MOCVD epitaxy development for 111-V / GaN on Si (uniformity, defect control, repeatability on 200 mm) * Supporting unit processes: CMP, thermal processes/furnace steps, metallization readiness, coating/clean modules, and integration constraints for downstream foundry re-entry **C. Yield engineering, process control, and pilot stability** Implement the pilot-ready quality backbone: * Define critical-to-quality (CTQ) parameters and establish SPC/PC monitors * Drive root-cause analysis for excursions and systematic defects * Own yield ramp plans and sustainment (targeting consistently high bonding and epi outcomes) **D. Equipment** & **metrology strategy (selection -->** **qualification** \--> **uptime)** Select, qualify, and operationalize toolsets required for pilot production, including tool acceptance criteria, recipe portability, and preventive maintenance routines. **E. External foundry and supplier coordination** Act as the technical owner interfacing with: * External foundries for wafer processing/ re-entry flows and back-end integration * Epi/material suppliers and local/global supply chain stabilization (qualification plans, incoming specs, performance scorecards) **F. Documentation** & **"transfer package" for industry sampling** Produce the full pilot-line transfer kit: * Process flows, BOMs, specs, recipes, control plans, FMEAs * Lot genealogy + traceability structure * Industry sampling documentation (sample CoC/CoA expectations, reliability test hooks, measurement definitions) **G. Team leadership** & **execution cadence** Lead a multi-disciplinary engineering team spanning process, integration, metrology, and equipment functions. Establish effective execution cadence and drive structured troubleshooting to deliver stable pilot outcomes. * Proven experience in semiconductor process development, integration, or pilot-line scale-up * Hands-on expertise in wafer bonding, epitaxial growth (111-V and/or GaN), and supporting unit processes such as CMP, thermal processing, and metallization readiness * Experience defining end-to-end process flows and transitioning technologies from lab or prototype stage to pilot production * Strong background in yield engineering, SPC, process control, and root-cause analysis * Experience selecting, qualifying, and sustaining semiconductor process equipment and metrology tools * Experience producing comprehensive process documentation and transfer packages suitable for industry-grade sampling * Prior experience leading or mentoring multi-disciplinary engineering teams * Ability to operate effectively in a pilot environment with evolving processes, tight timelines, and cross-functional dependencies **Please be informed that only shortlisted candidates will be notified.** Job Type: 2-Year Contract Location: Kent Ridge Campus Organisation: NUS Enterprise